1998/1999 Monthly Chapter Meeting Notices

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1997/1998 Monthly Chapter Meeting Notices
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September '98 Meeting Notice

When/Where
Tuesday, September 8, 1998. The Bold Knight of Sunnyvale, 769 North Mathilda Ave Sunnyvale, CA. 5:30 p.m. - 8:00 p.m.
Topic/Speaker
Annual Social and Business Planning Session
Details
The Santa Clara Valley Electromagnetic Compatibility Society invites all
EMC society members and prospective members to attend a social and 
fun talk on Tuesday 8 September 1998 at the Bold Knight. Hear Bill Ritenour's famous 
tale on the EMC hazards of filling up at the gas station! The
purpose of this event is to promote interaction and discussion about useful
topics for the technical sessions to be held during the 1998-1999
season, and to have a good time.  The chapter also invites prospective speakers to attend
this session and submit their presentation for consideration.

Suggested topics include: measurements (techniques, technology, problems,
corrections, calibration); test facilities (shielded rooms, open field test sites,
screen rooms, anechoic and semi-anechoic chambers); EM noise sources and studies;
Design for reduced noise; ESD; antennas and propogation; EMC standards and regulations;
EMC and Signal Integrity issues, and computer aided analysis and design.

Anyone interested in presenting an outline of these or other related topics
should contact Zorica Pantic-Tanner at (415) 338-7739

October '98 Meeting Notice

When/Where
COCKTAILS (5:00pm) DINNER (5:30pm):
El Torito's Restaurant 2950 Lakeside Drive, Santa Clara, CA
MEETING:
Tuesday October 13th, 1998, Auspex, 2800 Scott Blvd. Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"Radiated and Injected Tests - When are they equivalent?"
Dr. Jose Perini, IEEE EMC Society Distinguished Lecturer
Details
Radiated and Injected Tests � When are they Equivalent?

By Prof. Jose Perini

Syracuse University

5207 S. Atlantic Av. Apt. 1221

New Smyrna Beach, FL 32169-4558

E-mail: [email protected]



The performance of radiated tests requires the use of very expensive
facilities and equipment in order to produce the necessary high fields,
while protecting the environment from interference. Several researchers
looked at the possibility of reproducing these tests by strategically
injecting some voltage and /or current sources in the equipment under
test (EUT). This approach requires much lower signal levels reducing
substantially the test cost. However no proof has ever been set forth
showing if or when both tests are equivalent.

In this presentation the theoretical foundation for the equivalence of
these tests will be derived. First, it is shown that this can only be
done for linear reciprocal EUT's. Second, it is shown that the
equivalence can only be established at a selected number of ports. The
currents and voltages induced on any other places of the EUT are
radically different for each test. The difference may be as much as 30
dB in the example examined. Third, for the port equivalence to be true
the injected sources have to be coherent, that is, produced by the same
generator, and have to have specific amplitude and phase relationships.
The derivation of the test equivalence shows how the incident field
should be established in the radiated tests. It also shows how to obtain
the correct amplitude and phase of the injected sources, and where they
should be placed. Examples and comparison of the radiated and injected
tests will be presented using numerical simulation.

November '98 Meeting Notice

When/Where
COCKTAILS (5:00pm) DINNER (5:30pm):
El Torito's Restaurant 2950 Lakeside Drive, Santa Clara, CA
MEETING:
Tuesday November 10th, 1998, Auspex, 2800 Scott Blvd. Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"EMC in the European Union"
Diethard Moehr, Siemens AG
Details
"EMC in the European Union"


On November 10, the Santa Clara Valley Chapter of the IEEE EMC Society will
hear a presentation by Diethard Moehr, Siemens AG on "EMC in the European
Union".
One of largest economic communities is the world is the European Union (EU).
 Manufacturers of products that are destined for this market must comply with
stringent technical and marketing EMC regulations.  Mr. Moehr will cover a
number of important topics related to these requirements, and what measures US
manufacturers can take now and in the future to simplify the EU EMC compliance
process.  Topics that Mr. Moehr will cover include:
European EMC Directive and national EMC laws
Legal requirements on EMC emission and immunity testing in the EEA
(EU + Norway + Iceland + Lichtenstein);
EMC Directive and CE marking;
Main EMC standards to be used
Application of the EMC Directive to modules, apparatus, systems and
installations;
Guidelines on the application of the EMC Directive;
Market sampling testing in the EU;
Penalties for violating the EU legislation on EMC;
What is the SLIM initiative on EMC - Where does the EU move EMC wise?
Diethard Moehr is the Head of Staff Office, EMC, At Siemens AG, Erlangern
Germany.  He has been an active member of the EU EMC community for many years
and is currently an active member in the following European Standards
organizations: DKE (German Commission of Electrotechnique); ECMA (European
Computers Manufacturers Association) including technical Committee TC20 on EMC;
VDMA (Association of German manufacturers of Machines and Installations); ZVEI
(Central Organization of Electrotechnical Manufacturers of Germany); IEC TC65
SCA WG4 (responsible for the IEC 801-X series); IEC TC77 SCA WG6 and IEC TC77
SCB WG3 (responsible for the IEC 61000-X-X series EMC Emission and Immunity
standards); German Speaker for IEC TC77; German Deputy Speaker for IEC TC77
SCB; advisor of the European Commission on EMC, Directorate Generale, DG III,
DG XII und DG XIII; and, starting in January 1999, Secretary of IEC TC77.

December '98 Meeting Notice [ Handouts (289k) ]

When/Where
DINNER (5:30pm):
Auspex Cafeteria, 2800 Scott Blvd, Santa Clara, CA
MEETING:
Tuesday December 8th, 1998, Auspex, 2800 Scott Blvd. Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"A New Common-Mode Voltage Probe for Predicting EMI from Unshielded Differential-Pair Cables"
Neven Pischl, Bay Networks
Details

On December 8, the Santa Clara Valley Chapter of the IEEE EMC
Society will hear a presentation by Neven Pischl of Bay 
Networks on "A New Common-Mode Voltage Probe for Predicting 
EMI from Unshielded Differential-Pair Cables".
Common-mode (CM) currents on I/O cables are primary sources 
of EMI in many electronic devices. Measuring the CM voltage at 
the I/O connectors can be an alternative to measuring CM 
currents. Sources of CM currents and voltages are discussed, 
and a CM voltage probe for prediction of the EMI levels from 
unshielded differential twisted-pair cables is described. CM 
voltages at the RJ-45 ports were measured and correlated to 
the 10m E-field levels of 8 DUTs. A CM-voltage level that 
corresponds to the EN 55022 A limit has been derived. This 
allows the prediction of radiated emissions based on CM 
voltage measurements at the connectors. This bench-tool can 
be instrumental in reducing the time and cost of 
troubleshooting EMI problems.
Mr. Pischl started his career as a research assistant at the 
University of Zagreb in Croatia designing EM field sensors 
and studying protection against HF EM field exposure.  After 
receiving his Masters of Science Degree from the University 
of Zagreb, he worked in the EMC department of Italian 
Aerospace "Aeritalia" in Turin designing EM Field probes and 
EMC testing space satellites and aircrafts.  He was a guest-
scientist at the Austrian Research Center Seibersdorf 
researching the accuracy of EM-field measurements in near-
zone of the ISM (industrial, scientific and medical) sources, 
and of broadband isotropic field probe calibration methods.
At Philips Electronic Industry in Vienna, Austria, he held 
the position of Senior EMC Engineer and EMC Group Manager 
while working on EMC design for telefax and cordless 
telephone devices.  While in Austria, he was on the
Austrian National Committee for EMC in ITE devices.
Currently, Mr. Pischl works at Bay Networks in Santa Clara, 
CA. He is involved in EMC Design in 10/100 MBit, GBit, and 
wireless Ethernet devices. He is also involved in research 
for new measurement methods and publishing EMC layout
Guidelines. He is a NARTE certified EMC engineer and a 
member of the IEEE EMC Society.

January '99 Meeting Notice

When/Where
DINNER (5:30pm-7:30pm):
Auspex Cafeteria, 2300 Central Expressway, Building A, Santa Clara, CA
MEETING (7:30pm-9:30pm):
Tuesday January 12th, 1999
Auspex, 2300 Central Expressway, Building A, Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"Spread Spectrum Clock Techniques"
Don Bush, dBi Corporation
Details

On January 12, the Santa Clara Valley Chapter of the IEEE
EMC Society will hear a presentation by Don Bush of dBi 
Corporation on "Spread Spectrum Clock Techniques". 
Electronic emissions from an electronic device may be 
reduced by frequency modulating the system clock. This 
method, referred to as Spread Spectrum Clock Generation, or 
SSCG, is applicable to most microprocessor based systems.  
A unique waveform used to frequency modulate a digital clock
signal results in a spectrum with sidebands that are nearly 
uniform in amplitude.  This has the effect of spreading the 
energy of a discrete frequency or its harmonic over a wider 
bandwidth, thereby reducing the amplitude of each harmonic.  
The development and implementation of this technique will be 
discussed.
Don Bush worked in or managed the EMC lab at IBM Lexington, 
KY, from 1965 until its acquisition by Lexmark International 
in 1991.  He worked for Lexmark from this date until March, 
1996.  At this time he founded dBi Corporation and continued 
in the EMC profession(art?).  Don received the Bachelor of 
Electrical Engineering and Master of Electrical Engnieering 
Degrees from the University of Louisville, is a registered 
professional engineer, and a NARTE certified EMC engineer. 
He has authored and presented eleven papers on EMC subjects, 
and holds one patent.  His company, dBi, is an A2LA 
accredited EMC test lab.

February '99 Meeting Notice

When/Where
DINNER (5:30pm-7:30pm):
Auspex Cafeteria, 2300 Central Expressway, Building A, Santa Clara, CA
MEETING (7:30pm-9:30pm):
Tuesday February 9th, 1999
Auspex, 2300 Central Expressway, Building A, Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"New Techniques for Reducing PCB Common-Mode Radiation"
Robert Dockey, HP
Details

On February 9, 1999, the Santa Clara Valley Chapter of 
the IEEE EMC Society will hear a presentation by Robert 
Dockey of HP on "New Techniques for Reducing PCB 
Common-Mode Radiation."
Have you ever had the experience of believing that you 
had done everything humanly possible to reduce the 
radiated emissions from an unshielded printed circuit 
assembly and yet still measure unacceptable margins? If 
so, this presentation could help explain the reasons why. 
Even when all of the common emission suppression measures 
like power supply decoupling, cable filtering, loop area 
control and full ground planes have been utilized, there 
is still one dominant coupling mechanism remaining which 
can be manipulated to improve the margin.  Unfortunately 
it may also set a lower limit on the possible emission 
level which can be obtained from a specific design.  This 
mechanism is referred to as �Ground Plane Voltage Gradient 
contamination. This presentation will attempt to describe 
and analyze this radiated emission mechanism and present 
several design techniques which can be used to deal with 
it successfully.
A multi-layer printed circuit board with a "good ground 
plane" can produce common-mode radiation similar to a 
dipole antenna. This ground plane is commonly thought of 
as a low impedance path for returning currents and one 
which is of constant potential across its area.  In fact, 
these currents give rise to voltage gradients in the plane 
which act as sources of common-mode current.  The majority 
of the RF current flowing along a signal trace on a 
multi-layer printed circuit board (PCB) returns on the 
ground plane directly beneath the signal trace. However, a 
small portion of the ground-plane current also can return 
via indirect paths causing the PCB and attached cables (if 
present) to produce common-mode radiation similar to a 
dipole antenna.  Several new techniques to reduce these 
emissions by lowering the inductance of the ground return 
or by bypassing the common-mode current on the cables are 
presented. These cost-effective techniques can be employed 
on two-sided or multi-layer PCBs.  Previous independent 
work by German, Ott and Paul experimentally investigated 
the radiated emissions from a printed circuit board (PCB) 
with a digital circuit that produced current on a signal 
trace that returned via an adjacent ground-return trace. 
They demonstrated that if this two-wire transmission-line 
is slightly unbalanced, it will radiate as an asymmetric 
dipole antenna producing common-mode radiation at much 
greater levels than the differential-mode radiation from 
the current loop. A direct prediction of this radiation 
was later performed by Hardin, Paul and Naishadham.
In 1993, Dockey discovered that a relatively small PCB with 
a solid ground-plane could also produce common-mode radiation.  
On this truncated Microstrip transmission-line, the majority 
of the signal-trace current returns on the ground plane beneath 
the signal trace. 
However, this current encounters the finite inductance of the 
ground plane and produces a voltage gradient. The voltage 
gradient, commonly called the ground-noise voltage, then 
causes a small portion of the signal-trace current to flow 
through the distributed stray capacitance of the ground plane.
This presentation will elaborate on these findings and propose 
several methods which can be used to effectively mitigate the 
radiation mechanisms.
Bob Dockey is the EMC Engineering Group manager at the Hewlett 
Packard division in Vancouver Washington. He has a BSEE from 
the University of Missouri at Rolla and is certified as an EMC 
engineer by the National Association of Radio and Television 
Engineers. He is the author of three technical papers on various 
EMC subjects and is a member and Distinguished Lecturer of the 
IEEE EMC Society.
Bob has been with Hewlett Packard for 13 years as both an EMC 
engineer and engineering manager. Previously, he spent 13 years 
as a TEMPEST engineering manager for TRW in Colorado 
Springs, Colo.

March '99 Meeting Notice

When/Where
DINNER (5:30pm-7:30pm):
Auspex Cafeteria, 2300 Central Expressway, Building A, Santa Clara, CA
MEETING (7:30pm-9:30pm):
Tuesday March 9th, 1999
Auspex, 2300 Central Expressway, Building A, Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"IEC 1000-4-6 Immunity Testing"
David Pomerenke, HP
Details

On March 9, 1999, the Santa Clara Valley Chapter of the IEEE 
EMC Society will hear a presentation by David Pommerenke of 
HP on "Conducted Immunity IEC 61000-4-6".
The talk will review the test methods as they are explained 
in the standard. Unavoidably this shows where decisions need 
to be made and at which points it is hardly possible to follow 
the standard word by word. Typical resulting implementations 
and setups will be provided.  It will be shown how it is 
possible to reduce the test time by hard- and software 
methods.  The calibration methods of different coupling 
devices will be explained by there equivalent circuits and the 
influence of simplification used is going to be pointed out. 
The injected current will be used to compare test results for 
different coupling devices (current clamp, EM-clamp etc.) under 
different support equipment load conditions.
Most likely the discussion will point at further problems in
implementing the standard, probably at some other smart 
solutions and will help to assess the risk of failing for 
different product families. Hopefully, most listeners will 
walk home with a better understanding of the calibration and a 
bunch of ideas on how to implement or improve their conducted 
immunity test setup.
David Pommerenke was born in Michigan in 1962. He grew up in 
Germany where he received his diploma in Electrical Engineering 
in 1989 and his Ph.D. titled 'Transient Fields of ESD'  at the 
Technical University Berlin. He continued his research and 
teaching activities in EMC and high voltage techniques at that 
University.  He published 30+ papers on ESD physics, testing, 
high voltage partial discharge measurement techniques, 
RF-absorber evaluation and project oriented teaching. In 1996 
he joined Hewlett Packard in Roseville, CA where he is in 
charge of immunity testing, test method design and EMC
consulting for the Roseville Hardware Test Center.  He 
participates in the IEC TC77B on immunity standards and works 
within ANSI C63.16 and the ESD Association working group 14 on 
ESD simulator calibration and test methods.

April '99 Meeting Notice

When/Where
DINNER (5:30pm-7:30pm):
Auspex Cafeteria, 2300 Central Expressway, Building A, Santa Clara, CA
MEETING (7:30pm-9:30pm):
Tuesday April 13th, 1999
Auspex, 2300 Central Expressway, Building A, Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
"Solving Real World EMC Problems using the FDTD Modeling Code"
Dr. Gary Haussmann, Silicon Graphics Inc.
Details

Finite Difference Time Domain (FDTD) is becoming one of the most popular
electromagnetic modeling techniques. The major advantages of the FDTD
method include: time domain transient analysis that are useful for solving
signal integrity and high speed interconnect problems; animations of the
overall electrodynamic performance of structures that provide a greater visual
understanding of the physics underlying the problem; and finally, by
taking the Fourier transform of the time-domain results, one can readily 
obtain the frequency domain response using only one simulation.
The FDTD method is an explicit numerical solver for modeling vector
electromagnetic wave phenomena by direct integration of Maxwell's two
time-dependent curl equations.  In the FDTD method, the spacial
derivatives of the curl are implemented using finite difference equations in a
Cartesian space mesh. The spacial and time derivatives are then implemented on 
a computer using a leapfrog time-space integration scheme.  Using this scheme, 
the E-fields and H-fields are found throughout the entire analysis region at 
each time step.  Once the fields are found, secondary values such as voltage, 
current, charge, electric and magnetic flux, power density, impedance, 
capacitance, inductance, S-parameters, and far field radiation patterns can 
be obtained.
The presentation will cover how the FDTD method works, and how it can be
effectively used to solve real world EMC problems ranging from time-domain
signal integrity problems commonly found in high speed circuit design to
the more traditional frequency-domain EMC problems associated with enclosure
and printed circuit board resonances, radiation through apertures, and
crosstalk.
Dr. Gary Haussmann received his B.S., M.S., and Ph.D. in Electrical
Engineering from the University of Colorado at Boulder.  During his graduate 
work he specialized in numerical simulation and scientific visualization
associated with electromagnetics analysis.  Prior to joining the Silicon 
Graphics EMC group, he worked at Cray Research developing explicitly parallel 
schemes of the FDTD method for distributed memory parallel computers such as 
the Cray T3E.  His current interest include the application of the FDTD method 
to EMC problems, 3D visualization, numerical optimization, and the Perfectly
Matched Layer (PML) as a solution to FDTD boundary conditions.

May '99 Meeting Notice

When/Where
DINNER (5:30pm-7:30pm):
Auspex Cafeteria, 2300 Central Expressway, Building A, Santa Clara, CA
MEETING (7:30pm-9:30pm):
Tuesday May 11th, 1999
Auspex, 2300 Central Expressway, Building A, Santa Clara, CA. 7:30pm - 9:30pm
Topic/Speaker
""SFSU Recent Research Projects""
Moderator: Dr. Zorica Pantic-Tanner
Details

"SFSU Recent Research Projects"
Moderator: Dr. Zorica Pantic-Tanner
           Director, School of Engineering
           San Francisco State University
It has been almost 1 1/2 years since the Santa Clara Valley Chapter of
the IEEE EMC Society hosted the students of San Francisco State University as
they present the results of their ongoing research projects in EMC and SI
(Signal Integrity).  Since then, the facilities and capabilities of the SFSU
Applied Electromagnetics Center of Excellence (AECE) have been
greatly expanded thanks to an NSF grant, equipment donations from
Lindgren, HP, SGI, and Sony, student research grants from
Lockheed-Martin, and help from the numerous EMC Society members. The
center  now has  a 750 GTEM cell, a shielded room, scalar and vector 
network analyzers, a 12 GHz spectrum analyzer, EMI receivers, an HP VEE
based automated data aquisition system, HP and Silicon Graphics 
workstations, and professional grade EM modeling software including Ansoft 
FEM/HFSS, Cray Research LC FDTD, NEC MOM, and Spice.
The EMC concepts have been integrated throughout the EE curriclum and the
expanded laboratory capability has given the students the opportunity to
continue the high caliber of EMC and SI research in such diverse areas as
time/frequency domain analysis of printed circuit board crosstalk mechanisms,
minimization of signal integrity waveform distortions through proper 
transmission line source and trace termination techniques, and radiated field 
coupling into shielded enclosures with apertures.
Come join us for the last chapter meeting before the summer break, as Director
Pantic-Tanner gives us a photographic tour of the SFSU Applied Electromagnetics
Center of Excellence, followed by individual presentations of students in
the areas of research indicated above.
Dr. Zorica Pantic-Tanner is currently Director of the School of Engineering at
San Francisco State University where she oversees the work of 25 faculty and
staff members and about 600 students in civil, electrical, and mechanical
engineering.  She received her B.S., M.S., and Ph.D. degrees in Electrical
Engineering from the University of Nish in Yugoslavia in 1975, 1978, and 1982,
respectively. She became an Assistant Professor in 1978 and an Associate
Professor in 1982 in the Department of Electronic Engineering at the
University of Nish. In 1984 she was awarded a Fulbright Scholarship for
postdoctoral research in the area of Applied Electromagnetics. She worked in 
the Electromagnetics & Communications Lab of the University of Illinois at
Urbana-Champaign from 1984 until 1989, first as a Fulbright Postdoctoral
Fellow and then as a Visiting Scientist. In 1989 she joined the School of
Engineering at San Francisco State University as an Associate Professor and in 
1996 was promoted to Full Professor.
Dr. Pantic-Tanner's research and teaching interests are in the areas of
Electromagnetic Field Theory, Applied Electromagnetics and Electromagnetic
Compatibility. She has published over 50 conference and journal papers
in these areas.  In July of 1997, Dr. Pantic-Tanner received an NSF grant to
improve the EMC capabilities of the Center for Applied Electromagnetics which 
is used for both instructional and research purposes.  Dr. Pantic-Tanner is an
officer of the Santa Clara Valley Chapter of the IEEE EMC Society, a member of 
the IEEE International EMC Education Committee, and Vice-Chair of the IEEE
International EMC Numerical Modeling Committee.  She developed and taught 
several EMC courses, for which she was awarded a Certificate of Achievement at 
the 1994 International EMC Symposium in Chicago.
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